GMS30C7201 Datasheet, PDF (185/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
12.8 Medium Speed Infra-red Port (MIr)
The MIr comprises a dedicated serial port and RTZ modulator/demodulator supporting the
Infrared Data Association (IrDA) standard for transmission/reception at 0.576 and 1.152Mb/s.
Frames contain an 8-bit address, an optional control field, a data field of any size that is a
multiple of 8-bits and a 16-bit CRC-CCITT. The start/stop flag and CRC generation/checking
is handled automatically. Data can be selectively saved in the receive buffer by programming
an address with which to compare against all incoming frames. Interrupts are signalled when
CRC checks performed on received data indicate an error, when a receiver abort occurs, when
the transmit buffer underruns during an active frame and is aborted, when the receive buffer
overruns and data is lost.
12.8.1 MIr (Medium-speed Infrared) Operation
Following reset, the MIr is disabled. Reset also causes the transmit and receive buffers and tail
register to be flushed (buffers marked as empty). Before enabling the MIr, the user must first
clear any writable or “sticky” status bits that are set by writing a one to each bit. (A sticky bit is
a readable status bit that may be cleared by writing a one to its location.) Next, the desired mode
of operation is programmed in the control register. At this point the user may “prime” the
transmit buffer by writing the first data word for transmission and any tail bytes, or the buffer
can remain empty and either programmed I/O or the DMA may be used to service it after the
MIr is enabled. Once the MIr is enabled, transmission/reception of data can begin on the
transmit and receive pins.
Bit Encoding
The MIr bit encoding uses an RZI modulation scheme where a ‘0’ is represented by a light pulse.
For both 0.576 and 1.152Mb/s data rates, the optical pulse duration is normally ¹/₄ of a bit
duration. For example, if the data frame (in the order of transmission) is 11010010, then Figure
12-7: RZ1/NRZ bit encoding example represents the signal that is actually transmitted.
LSB
MSB
Bit
1
1
0
1
0
0
1
0
Value
RZ1
NRZ
Data
Figure 12-7: RZ1/NRZ bit encoding example
Frame Format
MIr uses a flag (reserved bit pattern) to denote the beginning and end of a frame of information
and to synchronize frame transmission. A double flag is used to indicate the start of a frame, and
a single flag the end. The flag contains eight bits, which start and end with a zero and contain
six sequential ones in the middle (01111110). This sequence of six ones is unique because all
data between the start and stop flag is prohibited from having more than five consecutive ones.
Data that violates this rule is altered before transmission by automatically inserting a zero after
five consecutive ones are detected in the transmitted bit stream. This technique is commonly
referred to as “bit stuffing” and is transparent to the user. The information field within a MIr
frame is placed between the start and stop flags, consisting of an 8-bit address, an optional 8-bit
control field, a data field containing any multiple of 8-bits and a 16-bit cyclical redundancy
GMS30C7201 Data Sheet
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