GMS30C7201 Datasheet, PDF (201/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
Receive buffer Service Request Flag (RFS) (read-only, maskable interrupt)
The receive buffer service request flag (RFS) is a read-only bit which is set when the receive
buffer is not empty and requires service. When the RFS bit is set, an interrupt request is made
unless the receive buffer interrupt request mask (RIM) bit is cleared. The state of RFS is also
sent to the DMA controller, and may be used to signal a DMA service request. Note that RIM
has no effect on the generation of the DMA service request. After the DMA or CPU fills the
buffer, the RFS flag (and the service request and/or interrupt) is automatically cleared.
Framing Error Status (FRE) (read/write, non-maskable interrupt)
The framing error status (FRE) bit is set when a frame alignment error is detected by the receive
logic. A frame alignment error is detected on received data when a preamble is followed by
something other than another preamble or a start flag.
Figure 12-14: FIr status register 0 bit locations shows the bit locations corresponding to the
status and flag bits within FIr status register 0. Note that the reset state of all writable status bits
is unknown and must be cleared (by writing a one to them) before enabling the FIr. Also note
that writes to reserved bits are ignored and reads return zeros.
Address: 0h80011180
FISR0
Read/Write &
Read-Only
Bit
7
6 543210
WST1 WST FRE RFS TFS RAB TUR EIF
0
Reset 0 0 ? 0 0 ? ? ?
Figure 12-14: FIr status register 0 bit locations
Bit
Name
0
EIF
1
TUR
2
RAB
Description
Error in buffer
0 - Bits 32-36 are not set within either entry of the receive buffer
1 - One or more tag bits (32-36) are set within one or more entries of the receive buffer,
request interrupt, disable receive buffer DMA service requests
Note: once EIF is cleared, receive buffer DMA service requests are re-enabled
Transmit buffer Underrun
0 - Transmit buffer has not experienced an underrun
1 - Transmit logic attempted to fetch data from transmit buffer while it and the tail register
were empty, interrupt request signalled if not masked (if TUS=1)
Receiver Abort
0 - No abort has been detected for the incoming frame
1 - Abort detected during receipt of incoming frame, two or more symbols containing no
pulses (0000) detected on receive pin, EOF bit set in receive buffer next to last piece of
“good” data received before the abort, interrupt requested
Table 12-32: FIr Status Register 0
GMS30C7201 Data Sheet
12-47