GMS30C7201 Datasheet, PDF (15/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Introduction
1.1.5
Peripherals and communications
Communications are well-catered for, by two UARTs, an IrDA interface (supporting slow,
medium and fast protocols), a serial interface to a modem CODEC chip, for use by the soft-
modem, and an on-chip keyboard controller, which directly scans the key matrix. One of the two
UARTs is used to implement the IrDA protocol. If IrDA is not being used, then this UART is
available for general use. A synchronous serial interface allows connection to a variety of
devices, such as an RF modem or a Multimedia Card. A slave USB port supports connection of
an GMS30C7201-based PDA as a peripheral to a PC or other USB host controller. A group of
general purpose I/O pins can be utilized as required in a PDA design. An on-chip DAC supports
audio output, and an on-chip ADC supports microphone input, the digitizer tablet and battery
status monitoring functions. Internally, three general-purpose timers and a real-time clock
provide timer functionality to be used as required by the O/S, and a two-channel general purpose
DMA controller can be allocated to the communications peripherals, as required.
1.1.6
Power management
The GMS30C7201 incorporates advanced power management functions, allowing the whole
device to be put into a standby mode, when only the real time clock runs. The SDRAM is put
into low-power self refresh mode to preserve it’s contents. The GMS30C7201 may be forced
out of this state by either a real-time clock wake-up interrupt, a user wake-up event (which
would generally be a user pressing the “on” key) or by the UART ring-indicate input. The power
management unit (PMU) controls the safe exit from standby mode to operational mode,
ensuring that SDRAM contents are preserved. In addition, halt and slow modes allow the
processor to be halted, or run more slowly than usual, to reduce power consumption. The
processor can be quickly brought out of the halted state by a peripheral interrupt. The advanced
power management unit controls all this functionality. In addition, individual devices and
peripherals may be powered down when they are not in use. For example, the VGA controller
can be disabled when an external monitor is not in use (which saves not only the power of the
digital controller, but also of the analog DACs), or the Piccolo DSP coprocessor can be
powered-down when DSP support (in soft-modem code, for example) is not required.
1.1.7
Test and debug
The GMS30C7201 incorporates the ARM standard test interface controller (TIC) allowing 32-
bit parallel test vectors to be passed onto the internal bus. This allows access to the ARM720T
macro-cell core, and also to memory mapped devices and peripherals within the GMS30C7201.
In addition, the ARM720T and Piccolo include support for the ARM debug architecture
(Embedded ICE), which makes use of a JTAG boundary scan port to support debug of code on
the embedded processor and DSP cores. The same boundary scan port is also used to support a
normal pad-ring boundary scan for board level test applications.
GMS30C7201 Data Sheet
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