GMS30C7201 Datasheet, PDF (134/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

LCD & VGA Controllers
synchronization signal (HSYNC), and the frame clock is used as the vertical synchronization
signal (VSync). Pixel data is output one pixel per clock, rather than 4, 8 or 2²/₃pixels per clock,
as it is in the passive LCD modes.
11.2.6 Sharing VGA and LCD data
Generally when the LCD and the VGA interface are running concurrently, both are operating
entirely independently, and therefore two separate DMA channels are running at the same time.
This means that the memory bandwidth consumption is the sum of the bandwidth required for
the two DMA channels. Clearly this is not very efficient if the LCD and the VGA are displaying
the same data. Therefore, there is an option to share data between the VGA and the LCD.
The timings of the VGA and the LCD must be synchronized. The LCD timing generator must
be programmed so that the LCD slightly trails the VGA in outputting pixel data. Since there is
a common DMA data path to the VGA and the LCD, the data is written into both FIFOs. The
request is only generated when there is sufficient space in both FIFOs for the DMA data. This
means that the FIFO levels of the two displays must be kept as close as possible. They cannot
be kept exactly the same, because of the bursty nature of the LCD data, especially in color STN
mode. However, by programming a small horizontal back porch offset from the LCD to the
VGA, they can be kept broadly similar.
It is important that the free space in each of the FIFOs is kept as close as possible, because the
request is only generated when there is enough space in both FIFOs, and if the FIFO levels are
significantly different, then FIFO underflow could occur on one FIFO, due to the other FIFO
not having reached the level at which its request is generated. When the images on the two
screens are likely to be different at some stage in the future but are currently the same, the two
DMA channels can be operated independently. The VGA and LCD enables “on” in the same
control register, so they can be enabled simultaneously.
11-6
GMS30C7201 Data Sheet