GMS30C7201 Datasheet, PDF (157/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
12.2 Peripheral DMA Controller
The 7201 has an on-chip DMA controller (DMAC) that can transfer data on up to three
channels. The following sections describe the Direct Memory Access unit (DMAC).
Overview
Register Descriptions
DMAC Operation
Examples of Use
12.2.1 Overview
This chip includes a three-channel direct memory access controller (DMAC). The DMAC can
be used in place of the CPU to perform high-speed transfers between peripheral devices and
memory space. Note the DMA controller can only transfer data to and from SDRAM. Transfers
to addresses other than SDRAM will produce unpredictable results.
Features
The DMAC has the following features.
• Three Channels
• 4 Gbytes of address space on the architecture
• Max Transfer rate: 910MB/s
• Max Transfer number: 16384
• Address mode: Single address is supported.
• Channel function: Transfer mode is different in each channel.
Channel 0
This channel has a source address reload function, which is used by sound interface
controller. The memory space of sound I/O device consists of double buffer. The sound
interface uses exception bus mode and word access. Exception bus mode: when the
request is active, DMAC serves only one time operation.
Channel 1
This channel is used by the Infrared Communication Port(ICP). The channel uses
exception bus mode and word access.
Channel 2
This channel is used by the Universal Serial Bus(USB). The channel uses burst bus
mode and word access.
• Channel priority level : Selectable fixed mode
• Interrupt request : An interrupt request can be generated to the CPU after transfers end
by the specified counts.
GMS30C7201 Data Sheet
12-3