GMS30C7201 Datasheet, PDF (314/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Debug and Test Interface
14.3 Test Access Port and Boundary-Scan
GMS30C7201 contains full boundary scan on its inputs and outputs to help with circuit board
test. This supports both INTEST and EXTEST, allowing patterns to be applied serially to the
GMS30C7201 when fixed in a board and for full circuit board connection respectively. The
boundary-scan interface conforms to the IEEE Std. 1149.1- 1990, Standard Test Access Port and
Boundary-Scan Architecture. (Please refer to this standard for an explanation of the terms used
in this section and for a description of the TAP controller states.) The boundary-scan interface
provides a means of testing the core of the device when it is fitted to a circuit board, and a means
of driving and sampling all the external pins of the device irrespective of the core state. This
latter function permits testing of both the device's electrical connections to the circuit board, and
(in conjunction with other devices on the circuit board having a similar interface) testing the
integrity of the circuit board connections between devices. The interface intercepts all external
connections within the device, and each such “cell” is then connected together to form a serial
register (the boundary scan register). The whole interface is controlled via 5 dedicated pins:
TDI, TMS, TCK, nTRST and TDO. Figure 14-1: Test Access Port (TAP) Controller State
Transitions shows the state transitions that occur in the TAP controller.
Test-Logic Reset
tms=1
tms=0
Run-Test/Idle
tms=1
tms=0
Select-DR-Scan
tms=1
tms=0
tms=1
Capture-DR
tms=0
Shift-DR
tms=1 ^tms=0
Exit1-DR
tms=0
tms=1
tms=0
Pause-DR
tms=1 ^tms=0
Exit2-DR
tms=1
Update-DR
tms=1
tms=0
tms=1
Select-IR-Scan
tms=0
tms=1
Capture-IR
tms=0
Shift-IR
tms=1 ^tms=0
Exit1-IR
tms=0
tms=1
tms=0
Pause-IR
tms=1 ^tms=0
Exit2-IR
tms=1
Update-IR
tms=1
tms=0
Figure 14-1: Test Access Port (TAP) Controller State Transitions
14-4
GMS30C7201 Data Sheet