GMS30C7201 Datasheet, PDF (267/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
13.6.2 Interrupt control
The interrupt controller provides interrupt request status, interrupt enable and interrupt direction
selection registers. The enable register is used to determine whether or not an active interrupt
source should generate an interrupt request to the processor. All bits are cleared by system reset.
The interrupt request status indicates whether or not the interrupt source is causing a processor
interrupt.
The direction register is used to determine which interrupt request is generated to the CPU. If
the bit is set, FIQ request is activated. All bits are cleared by system reset.
TIC registers are used only for the production test. TIC input select register is used to drive
interrupt request sources by CPU. When this register is set, TIC register bits is regarded as
interrupt sources. This bit is cleared by system reset and should be cleared in normal operation.
TIC register is used as interrupt source when TIC input selection register is set.
Bit 23 is used as a software interrupt source. When Enable Register bit [23] is HIGH, an
interrupt request occurs. To disable the software interrupt, Enable Register bit [23] should be
LOW.
GMS30C7201 Data Sheet
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