GMS30C7201 Datasheet, PDF (294/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
13.10.3Functional Description
The counter is loaded by writing to the RTC data register. The counter will count up on each
rising edge of the clock and loops back to 0 when the maximum value (0xFFFFFFFF) is
reached. At any moment the counter value can be obtained by reading the RTC data register.
The value of the match register can also be read at any time, and the read does not affect the
counter value. The status of the interrupt signal is available in the status register. The status bit
is set if a comparator match event has occurred or 1 second has elapsed. Reading from the status
register will clear the status register.
RTC
Module core
data in
APB
registers
RTC
counter
URTCEV
A
P
B
data out
Match
32-bit
comparator
SRTCEV
B
register
u
s
PCLK
Sync
1Hz
control
Ripple
counter
CLK32768HZ
13.10.4Programmer’s Model
RTC registers
The following user registers are provided:
Figure 13-11: RTC block diagram
Register
RTCDR
RTCMR
RTCS
Name
RTC Data Register
RTC Match Register
RTC Status
Type
Read/Write
Read/Write
Read-only
Description
Writing to this 32-bit register will load the counter. A read will
give the current value of the counter.
Writing to this 32-bit register will load the match register. This
value can also be read back.
When performing a read from this location the interrupt flag
will be cleared. If a match event has occurred, bit[1] will be set.
For a second event, bit[0] will be set. This register is affected by
the control register.
Table 13-52: RTC register description
13-66
GMS30C7201 Data Sheet