GMS30C7201 Datasheet, PDF (275/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
pselspi
pa
pd
pwrite
pstb
spiirq
bres1
PCLK
APB
interface
pstb(txwclk)
txdatain
fiforeset
txempty
txfull
pstb(rxrclk)
rxdatain
fiforeset
rxempty
rxfull
Tx
buffer
Rx
buffer
tx shift reg
rx shift reg
SPICLK
MOSI
MISO
Figure 13-4: Block diagram of the SPI-MMC
The following signals come from (or go to) the APB bus controller of the ARM core.
Name
PA[5:2]
PSPISEL
PD[15:0]
PSTB
PWRITE
Description
This is part of the peripheral address bus, and is used by the
peripheral for decoding its own register accesses. The addresses
become valid before PSTB goes HIGH and remain valid after
PSTB goes LOW.
When HIGH, this signal indicates the SPI-MMC module has been
selected by the APB bridge. This selection is a decode of the
system address.
This is part of the peripheral data bus. The data bus is driven by
this block during read cycles (when PWRITE is LOW).
This strobe signal is used to time all accesses on the peripheral bus.
The falling edge of PSTB is coincident with the falling edge of
BCLK.
When HIGH, this signal indicates a write to a peripheral, and when
LOW, a read from a peripheral. This signal has the same timing as
the peripheral address bus. It becomes valid before PSTB goes
HIGH and remains valid after PSTB goes LOW.
Table 13-34: Signal description
GMS30C7201 Data Sheet
13-47