GMS30C7201 Datasheet, PDF (162/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
12.2.5 DMAC1 Registers
This section gives the address register and channel control registers of DMA channel 1.
Address
R/W Name
DMA Base + 0x14 R/W ADR1
DMA Base + 0x18 R/W TNR1
DMA Base + 0x1C R/W CCR1
Bit
[31:0]
[13:0]
[31:14]
[0]
[1]
[2]
Initialized
to
0x00...00
3FFF
0x00000
0
Contents
This value is start address of ICP RX
buffer.
Maximum Transfer Number of DMAC1
is 0x4000 word
Reserved bits
DMEN1 (DMAC1 enable bit)
0
MODSEL
When LOW, transfer from memory to I/
O.
When HIGH, transfer from I/O to
memory.
Reserved bits
0
MASK (The mask bit of transfer end
interrupt for ICP)
12.2.6 DMAC 2 Registers
Address
R/W Name
DMA Base + 0x20
R/W ADR2
DMA Base + 0x24
R/W TNR2
DMA Base + 0x28
R/W CCR2
[31:3] 0x0000
Table 12-4: DMAC1 Registers
Bit
[31:0]
[13:0]
[31:14]
[0]
[1]
[2]
[31:3]
Initialized
to
00x00
3FFF
0x0000
0
0
0
0x0000
Contents
This value is the start address of DMA
Channel for USB Controller
Maximum Transfer Number of DMAC2
is 0x4000 word
Reserved bits
DMEN
MODSEL
When LOW, transfer from memory to I/
O.
When HIGH, transfer from I/O to
memory.
MASK
Reserved bits
Table 12-5: DMAC2 Registers
12-8
GMS30C7201 Data Sheet