GMS30C7201 Datasheet, PDF (203/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
Whenever a CRC error is detected, the 33rd bit is set within the receive buffer. Each time a data
value is transferred to the buffer, the state of the tag bit is moved to the CRE bit in the status
register, indicating whether or not the frame has encountered a CRC error. Whenever CRE is
set, EIF is set within FISR0, an interrupt is signalled, and the receive buffer DMA request is
disabled.
Receiver Overrun Status (ROR)
(read-only, non-interrupting)
The receiver overrun flag (ROR) is set when the receive logic attempts to place data into the
receive buffer after it has been completely filled.
The 34th bit is set within the top entry of the receive buffer whenever an overrun occurs. Each
time a data value is transferred to the buffer, the state of the tag bit is moved to the ROR bit in
the status register, indicating that the next value in the buffer is the last “good” piece of data
before the overflow occurred. Whenever ROR is set, EIF is set within FISR0, an interrupt is
signalled, and the receive buffer DMA request is disabled.
Figure 12-15: FIr status register 1 bits shows the location of the flags within FIr status register
1. The bits within this register are read-only and do not produce interrupt requests. Note that
writes to bits 7,3 and 2 are ignored and reads return zero.
Address: 0h80011184
FISR1
Read-Only
Bit
76543210
Res. ROR CRE EOF Res. Res. TBY RSY
Reset 0 0 0 0 0 0 0 0
Figure 12-15: FIr status register 1 bits
Bit
Name
0
RSY
1
TBY
2
-
3
-
4
EOF
Description
Receiver Synchronized Flag (read-only)
0 - Receiver is in hunt more or is disabled
1 - Receiver logic is synchronized with the incoming data (no interrupt generated)
Receiver Synchronized Flag (read-only)
0 - Receiver is in hunt more or is disabled
1 - Receiver logic is synchronized with the incoming data (no interrupt generated)
Unused
Unused
End of Frame (read-only)
0 - Current frame has not completed
1 - The word in the receive buffer contains the last byte of data within the frame
Table 12-33: FIr Status Register 1
GMS30C7201 Data Sheet
12-49