GMS30C7201 Datasheet, PDF (190/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
buffer (the other byte is discarded), and the EOF tag is set in the buffer entry that corresponds
to the last piece of data that was received before the frame was aborted. The receiver then enters
hunt mode, searching for a flag. When the RAB bit is set, an interrupt request is made.
Transmit buffer Service Request Flag (TFS)(read-only)
The transmit buffer service request flag (TFS) is a read-only bit that is set when the transmit
buffer is not full and requires service to prevent an underrun. The state of TFS is also sent to the
DMA controller, and may be used to signal a DMA service request. After the DMA or CPU fills
the buffer, the TFS flag (and the service request) is automatically cleared.
Receive buffer Service Request Flag (RFS) (read-only)
The receive buffer service request flag (RFS) is a read-only bit that is set when the receive buffer
contains valid data. The state of RFS is also sent to the DMA controller, and may be used to
signal a DMA service request. After the DMA or CPU empties the buffer, the RFS flag (and the
service request) is automatically cleared.
Figure 12-9: Bit locations in Mlr status register 0 shows the bit locations corresponding to the
status and flag bits within MIr status register 0. Note that the reset state of all writable status bits
is unknown and must be cleared (by writing a one to them) before enabling the MIr. Also note
that writes to reserved bits are ignored and reads return zeros.
Address: 0h 8001 1080
MISR0
Read/Write &
Read-Only
Bit 7
6
54
32
10
WST1 WST0 RES RFS TFS RAB TUR EIF
Reset 0
0
00
0?
?
0
Figure 12-9: Bit locations in Mlr status register 0
Bit
Name
0
EIF
1
TUR
Description
Error in buffer (read-only)
0 - Bits 32-36 are clear within each valid entry of the receive buffer, receive buffer DMA service
requests are enabled
1 - One or more tag bits (32-36) are set within one or more entries in the receive buffer, request
interrupt, disable receive buffer DMA service requests
Transmit buffer Underrun
0 - Transmit buffer has not experienced an underrun
1 - Transmit logic attempted to fetch data from transmit buffer while it and the tail register were
empty, interrupt request signalled
Table 12-30: MIr status register 0
12-36
GMS30C7201 Data Sheet