GMS30C7201 Datasheet, PDF (318/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Debug and Test Interface
the SHIFT-DR state, test data is shifted into the bypass register via TDI and out via TDO after
a delay of one TCK cycle. Note that the first bit shifted out will be a zero. The bypass register
is not affected in the UPDATE-DR state.
14-8
GMS30C7201 Data Sheet