GMS30C7201 Datasheet, PDF (259/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
13.5 GPIO
This document describes the Programmable Input /Output module (PIO). This is an AMBA
slave module which connects to the Advanced Peripheral Bus (APB). For more information
about AMBA, please refer to the AMBA Specification (ARM IHI 0001).
13.5.1 Module overview
The PIO is an APB peripheral which provides 32 bits of programmable input/output divided
into four 8-bit ports: port A, port B, port C and port D. Each pin is configurable as either input
or output. At system reset, all ports default to input.
PIO
(connections to interrupt lines)
PADS
PD[7:0]
PA[6:2]
BnRES
PSEL
PSTB
PWRITE
APB
i/f
PORT
A
DATA
REG.
PORT
A
DIR.
REG.
PORT
B
DATA
REG.
PORT
B
DIR.
REG.
PA[7:0]
EPA[7:0]
PAOE[7:0]
PAOE[n]
PA[n]
EPA[n]
XPA[n]
PB[7:0]
EPB[7:0]
PBOE[7:0]
PBOE[n]
PB[n]
EPB[n]
XPB[n]
Connection of PIO lines
to the external pads
Note
Figure 13-3: PIO block diagram and PADS connections
Figure 13-3: PIO block diagram and PADS connections shows only the configuration for 16
bits.
Each port has a data register and a data direction register, both 8 bits wide. The data direction
register defines whether each individual pin is an input or an output. The data register is used to
read the value of the PIO pins—both input and output—as well as to set the values of pins that
are configured as outputs. When the PIO pin is defined as input, this input can be an interrupt
source with register setting.
GMS30C7201 Data Sheet
13-31