GMS30C7201 Datasheet, PDF (258/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
Value (binary number)
0000_0000
Initial value
Description
Table 13-22: TICIN bit description
Keyboard status register (KBSR)
This is a 2-bit readable register that indicates whether a keyboard interrupt has occurred. The
interrupt and the KBSR bit are cleared after the CPU reads KBSR. The KBSR bit is set when
the key buffer is full, or when the key is pressed in powerdown mode (keyboard disabled).
Bit
1
(Wake up)
Initial value
0
0
0
(Interrupt state)
Description
Wake up state:
0 = no key pressed in powerdown mode
1 = key pressed in powerdown mode
Key bufferstate:
0 = key buffer is not full
1 = key buffer is full
Table 13-23: KBSR bit description
TCLK register
This register does not exist: it is used to generate TIC clk in test mode. When the APB address
(PA) is TCLK register address and PSEL and PSTB is HIGH phase in test mode, TCLK is
HIGH, otherwise TCLK is LOW stage.
13-30
GMS30C7201 Data Sheet