English
Language : 

GMS30C7201 Datasheet, PDF (34/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption
Architecture Overview
3.2 SDRAM controller
3.2.1 Overview
The SDRAM controller is a key part of the GMS30C7201 architecture. The SDRAM controller
has two data ports—one for video DMA and one for the main ASB—and interfaces to a single
16-bit wide SDRAM. One to four 16, 64 or 128Mbit x16-bit devices are supported, giving a
memory size ranging from 2 to 64Mbytes.
3.2.2 Arbitration
The main ASB and video DMA buses are independent, and operate concurrently. The SDRAM
controller contains the arbitration logic, for selecting between the two buses, and between the
LCD and VGA on the video bus. The video bus is always higher priority than the main bus. The
SDRAM controller uses a modified round-robin arbitration between the LCD and the VGA, but
allows the highest priority device on the video bus to be programmed as either the LCD or the
VGA.
The video interface consists of separate address and request inputs to the SDRAM controller,
and shared data but individual acknowledge outputs to the VGA and the LCD. The video access
burst size is fixed to 16 words. The address is non-incrementing for words within a burst (as the
SDRAM controller only makes use of the first address for each burst request).
The arbitration scheme is modified round-robin. When the bus is idle, prioritization is fixed,
with whichever LCD or VGA is programmed as highest priority getting data next, if they
request data at the same time. When the bus is busy, the prioritization becomes round-robin, so
if the higher priority device wants two bursts one immediately after the other, but the other
device also requested a burst at the same time as the higher priority device, (or after, but before
the first burst to the other device completed), then the lower priority device would get the second
burst, and the higher priority device the third burst.
In use, the highest bandwidth video device (VGA or LCD) should be programmed as highest
priority in the SDRAM controller. If both devices are equal priority, and use the same
bandwidth, an arbitrary decision can be made. If only one video device is being used (for
example, only LCD is being used, as will most often be the case), then that device should have
the highest priority.
3-4
GMS30C7201 Data Sheet