GMS30C7201 Datasheet, PDF (271/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

13.7.2 Register map
Slow AMBA Peripherals
Address
Timer Base + 0x00
Timer Base + 0x08
Timer Base + 0x10
Timer Base + 0x14
Timer Base + 0x20
Timer Base + 0x28
Timer Base + 0x30
Timer Base + 0x34
Timer Base + 0x40
Timer Base + 0x48
Timer Base + 0x50
Timer Base + 0x54
Timer Base + 0x60
Timer Base + 0x64
Timer Base + 0x68
Timer Base + 0x7C
R/W
R/W
R
R/W
W
R/W
R
R/W
W
R/W
R
R/W
W
R/W
R
W
W
Initial Value
Register
0xFFFFFFFF Timer0 Base Register
0x00000000
Timer0 Counter Register
0x00
Timer0 Control Register
0x00
Timer0 Test Register
0xFFFFFFFF Timer1 Base Register
0x00000000
Timer1 Counter Register
0x00
Timer1 Control Register
0x00
Timer1 Test Register
0xFFFFFFFF Timer2 Base Register
0x00000000
Timer2 Counter Register
0x00
Timer2 Control Register
0x00
Timer2 Test Register
0x0
Top Control Register
0x0
Status Register
0x0
TICCLK selection in test mode
TICCLK Generation
Note: whenever this port is
written to, it will generate
TICCLK pulse.
Table 13-33: Timer port addresses
Base Register:
32-bit target count value (interval)
Counter Register:
32-bit up counter
Channel Control Register (Timer0, Timer1)
bit 0
1 = start count
0 = stop count
This bit clears automatically when the counter reaches the
target value if it is in non-repeat mode.
bit 1
1 = count repeat mode
bit 2
1 = reset counter register
bit[7:3] Reserved
GMS30C7201 Data Sheet
13-43