GMS30C7201 Datasheet, PDF (233/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Name
NCTS
Type
In
NDSR
In
NDCD
In
NRI
In
Slow AMBA Peripherals
Source/
Destination
External
External
External
RING signal
from AFE
Description
Clear to Send. When LOW, this indicates that the MODEM or data
set is ready to exchange data. The NCTS signal is a MODEM
status input whose conditions can be tested by the CPU reading bit
4 (CTS) of the MODEM Status Register indicates whether the
NCTS input has changed state since the previous reading of the
MODEM Status Register. NCTS has no effect on the Transmitter.
Note: Whenever the CTS bit of the MODEM Status Register
changes state, an interrupt is generated if the MODEM Status
interrupt is enabled.
Data Set Ready. When LOW, this indicates that the MODEM or
data set is ready to establish the communications link with the
UART. The NDSR signal is a MODEM status input whose
conditions can be tested by the CPU reading bit 5 (DSR) of the
MODEM Status Register. Bit 5 is the complement of the NDSR
signal. Bit 1(DDSR) of MODEM Status Register indicates
whether the NDSR input has changed state since the previous
reading of the MODEM status register.
Note: Whenever the DSR bit of the MODEM Status Register
changes state, an interrupt is generated if the MODEM Status
interrupt is enabled.
Data Carrier Detect. When LOW, indicates that the data carrier has
been detected by the MODEM data set. The signal is a MODEM
status input whose condition can be tested by the CPU reading bit
7 (DCD) of the MODEM Status Register.
Bit 7 is the complement of the signal. Bit 3 (DDCD) of the
MODEM Status Register indicates whether the input has changed
state since the previous reading of the MODEM Status Register.
NDCD has no effect on the receiver.
Note: Whenever the DCD bit of the MODEM Status Register
changes state, an interrupt is generated if the MODEM Status
interrupt is enabled.
Ring Indicator. When LOW, this indicates that a telephone ring
signal has been received by the MODEM or data set. The NRI
signal is a MODEM status input whose condition can be tested by
the CPU reading bit 6 (RI) of the MODEM Status Register. Bit 6 is
the complement of the NRI signal. Bit 2 (TERI) of the MODEM
Status Register indicates whether the NRI input signal has
changed from a LOW to a HIGH state since the previous reading
of the MODEM Status Register.
Note: Whenever the RI bit of the MODEM Status Register
changes from a HIGH to a LOW state, an interrupt is generated if
the MODEM Status interrupt is enabled.
The NRI input from the external PAD is not provided.
To use this signal, you should set up the UART control register of
the AFE interface. For further information, refer to 13.9 Analog
Front End, AFE (CODEC Interface) on page 13-56.
Table 13-2: Signal descriptions (Continued)
GMS30C7201 Data Sheet
13-5