GMS30C7201 Datasheet, PDF (160/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Fast AMBA Peripherals
12.2.4Register Configuration
Table 12-2: DMAC register summary summarizes the DMAC registers.
Address
DMACBase + 0x00
DMACBase + 0x04
DMACBase + 0x08
DMACBAse + 0x0C
DMACBase + 0x10
Name
Ch0_start_address_buffer0
Ch0_start_address_buffer1
Ch0_transfer_num_buffer0
Ch0_transfer_num_buffer1
Ch0_control
Description
# 32-bit R/W
# 32-bit R/W
# 32-bit R/W
# 32-bit R/W
# 32-bit R/W
DMACBase + 0x14
DMACBase + 0x18
DMACBase + 0x1C
Ch1_start_address
Ch1_transfer_number
Ch1_control
# 32-bit R/W
# 32-bit R/W
# 32-bit R/W
DMACBase + 0x20
DMACBase + 0x24
DMACBase + 0x28
Ch2_start_address
Ch2_transfer_number
Ch2_control
# 32-bit R/W
# 32-bit R/W
# 32-bit R/W
DMACBase + 0x2C
DMACBase + 0x30
DMACBase + 0x34
DMACBase + 0x38
DMACBase + 0x3C
Interrupt_flag
test_register0
test_register1
test_register2
DMA_operation
# 32-bit R/O
# 32-bit R/W
# 32-bit R/O
# 32-bit R/O
# 32-bit R/W
Table 12-2: DMAC register summary
The address register, transfer number register and channel control register of DMA channel 0.
Address
DMA Base + 0x00
R/W Name
R/W ADR0
Bit
[31–0]
Initialized
to
0x0
Contents
DMAC 0 Source Address (Buffer 0
Address)
This channel transfers data from External
Memory to the Sound Interface block
Table 12-3: DMAC0 Registers
12-6
GMS30C7201 Data Sheet