MC912D60ACPVE8 Datasheet, PDF (82/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Operating Modes and Resource Mapping
RFSTR1, RFSTR0 — Register Following Stretch
This two bit field determines the amount of clock stretch on accesses
to the 512 byte Register Following Map. It is valid regardless of the
state of the NDRF bit. In Single Chip and Peripheral Modes this bit
has no meaning or effect.
Table 5-3. RFSTR Stretch Bit Definition
RFSTR1
0
0
1
1
RFSTR0
0
1
0
1
Number of E Clocks
Stretched
0
1
2
3
EXSTR1, EXSTR0 — External Access Stretch
This two bit field determines the amount of clock stretch on accesses
to the External Address Space. In Single Chip and Peripheral Modes
this bit has no meaning or effect.
Table 5-4. EXSTR Stretch Bit Definition
EXSTR1
0
0
1
1
EXSTR0
0
1
0
1
Number of E Clocks
Stretched
0
1
2
3
ROMON28, ROMON32 — Enable bits for ROM
These bits are used to enable the Flash EEPROM arrays FEE28 and
FEE32 respectively.
0 = Corresponding Flash EEPROM array disabled from the memory
map.
1 = Corresponding Flash EEPROM array enabled in the memory
map.
Technical Data
82
Operating Modes and Resource Mapping
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor