MC912D60ACPVE8 Datasheet, PDF (329/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

MSCAN Controller
Programmer’s Model of Message Storage
17.12.4 Data Segment Registers (DSRn)
The eight data segment registers contain the data to be transmitted or
being received. The number of bytes to be transmitted or being received
is determined by the data length code in the corresponding DLR.
17.12.5 Transmit Buffer Priority Registers (TBPR)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
TBPR^{(1) R}
PRIO7
$01xD W
PRIO6
PRIO5
PRIO4
PRIO3
RESET
–
–
–
–
–
1. x is 5, 6, or 7 depending on which buffer Tx0, Tx1, or Tx2 respectively.
BIT 2
PRIO2
–
BIT 1
PRIO1
–
BIT 0
PRIO0
–
PRIO7 – PRIO0 — Local Priority
This field defines the local priority of the associated message buffer.
The local priority is used for the internal prioritisation process of the
msCAN12 and is defined to be highest for the smallest binary number.
The msCAN12 implements the following internal prioritisation
mechanism:
• All transmission buffers with a cleared TXE flag participate in the
prioritisation immediately before the SOF (Start of Frame) is sent.
• The transmission buffer with the lowest local priority field wins the
prioritisation.
• In cases of more than one buffer having the same lowest priority,
the message buffer with the lower index number wins.
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
MSCAN Controller
Technical Data
329