MC912D60ACPVE8 Datasheet, PDF (275/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Multiple Serial Interface
Serial Communication Interface (SCI)
Bit 7
6
5
4
3
2
1
Bit 0
R8
T8
0
0
0
0
0
0
RESET:
—
—
—
—
—
—
—
—
SC0DRH/SC1DRH — SCI Data Register High
$00C6/$00CE
Bit 7
6
5
4
R7/T7
R6/T6
R5/T5
R4/T4
RESET:
—
—
—
—
SC0DRL/SC1DRL — SCI Data Register Low
3
R3/T3
—
2
R2/T2
—
1
R1/T1
—
Bit 0
R0/T0
—
$00C7/$00CF
R8 — Receive Bit 8
Read anytime. Write has no meaning or affect.
This bit is the ninth serial data bit received when the SCI system is
configured for nine-data-bit operation.
T8 — Transmit Bit 8
Read or write anytime.
This bit is the ninth serial data bit transmitted when the SCI system is
configured for nine-data-bit operation. When using 9-bit data format
this bit does not have to be written for each data word. The same
value will be transmitted as the ninth bit until this bit is rewritten.
R7/T7–R0/T0 — Receive/Transmit Data Bits 7 to 0
Reads access the eight bits of the read-only SCI receive data register
(RDR). Writes access the eight bits of the write-only SCI transmit data
register (TDR). SCxDRL:SCxDRH form the 9-bit data word for the
SCI. If the SCI is being used with a 7- or 8-bit data word, only SCxDRL
needs to be accessed. If a 9-bit format is used, the upper register
should be written first to ensure that it is transferred to the transmitter
shift register with the lower register.
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Multiple Serial Interface
Technical Data
275