MC912D60ACPVE8 Datasheet, PDF (34/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Central Processing Unit
Table 2-1. M68HC12 Addressing Mode Summary
Addressing Mode
Inherent
Immediate
Direct
Extended
Relative
Indexed
(5-bit offset)
Indexed
(auto pre-decrement)
Indexed
(auto pre-increment)
Indexed
(auto post-decrement)
Indexed
(auto post-increment)
Indexed
(accumulator offset)
Indexed
(9-bit offset)
Indexed
(16-bit offset)
Indexed-Indirect
(16-bit offset)
Indexed-Indirect
(D accumulator offset)
Source Format
INST
(no externally
supplied operands)
INST #opr8i
or
INST #opr16i
INST opr8a
INST opr16a
INST rel8
or
INST rel16
INST oprx5,xysp
INST oprx3,–xys
INST oprx3,+xys
INST oprx3,xys–
INST oprx3,xys+
INST abd,xysp
INST oprx9,xysp
INST oprx16,xysp
INST [oprx16,xysp]
INST [D,xysp]
Abbreviation
INH
Description
Operands (if any) are in CPU registers
IMM
DIR
EXT
REL
IDX
IDX
IDX
IDX
IDX
IDX
IDX1
IDX2
[IDX2]
[D,IDX]
Operand is included in instruction stream
8- or 16-bit size implied by context
Operand is the lower 8-bits of an address in
the range $0000 – $00FF
Operand is a 16-bit address
An 8-bit or 16-bit relative offset from the
current pc is supplied in the instruction
5-bit signed constant offset from x, y, sp, or
pc
Auto pre-decrement x, y, or sp by 1 ~ 8
Auto pre-increment x, y, or sp by 1 ~ 8
Auto post-decrement x, y, or sp by 1 ~ 8
Auto post-increment x, y, or sp by 1 ~ 8
Indexed with 8-bit (A or B) or 16-bit (D)
accumulator offset from x, y, sp, or pc
9-bit signed constant offset from x, y, sp, or
pc
(lower 8-bits of offset in one extension byte)
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
Technical Data
34
Central Processing Unit
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor