MC912D60ACPVE8 Datasheet, PDF (377/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Technical Data — MC68HC912D60A
Section 19. Development Support
19.1 Contents
19.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
19.3 Instruction Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .377
19.4 Background Debug Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379
19.5 Breakpoints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 395
19.6 Instruction Tagging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 402
19.2 Introduction
Development support involves complex interactions between
MC68HC912D60A resources and external development systems. The
following section concerns instruction queue and queue tracking signals,
background debug mode, and instruction tagging.
19.3 Instruction Queue
The CPU12 instruction queue provides at least three bytes of program
information to the CPU when instruction execution begins. The CPU12
always completely finishes executing an instruction before beginning to
execute the next instruction. Status signals IPIPE[1:0] provide
information about data movement in the queue and indicate when the
CPU begins to execute instructions. This makes it possible to monitor
CPU activity on a cycle-by-cycle basis for debugging. Information
available on the IPIPE[1:0] pins is time multiplexed. External circuitry
can latch data movement information on rising edges of the ECLK
signal; execution start information can be latched on falling edges. Table
19-1 shows the meaning of data on the pins.
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Development Support
Technical Data
377