MC912D60ACPVE8 Datasheet, PDF (115/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

EEPROM Memory
Program/Erase Operation
8.6 Program/Erase Operation
A program or erase operation should follow the sequence below if AUTO
bit is clear:
1. Write BYTE, ROW and ERASE to desired value, write EELAT = 1
2. Write a byte or an aligned word to an EEPROM address
3. Write EEPGM = 1
4. Wait for programming, t_PROG or erase, t_ERASE delay time (10ms)
5. Write EEPGM = 0
6. Write EELAT = 0
If the AUTO bit is set, steps 4 and 5 can be replaced by a step to poll the
EEPGM bit until it is cleared.
It is possible to program/erase more bytes or words without intermediate
EEPROM reads, by jumping from step 5 to step 2.
8.7 Shadow Word Mapping
The shadow word is mapped to location $_FC0 and $_FC1 when the
NOSHW bit in EEMCR register is zero. The value in the shadow word is
loaded to the EEMCR, EEDIVH and EEDIVL after reset. Table 8-4
shows the mapping of each bit from shadow word to the registers
Table 8-4. Shadow word mapping
Shadow word location
$_FC0 bit 7
$_FC0, bit 6
$_FC0, bit 5
Register / Bit
EEMCR / NOBDML
EEMCR / NOSHW
EEMCR / bit 5⁽¹⁾
$_FC0, bit 4
$_FC0, bit 3:2
$_FC0, bit 1:0
$_FC1, bit 7:0
EEMCR / FPOPEN
not mapped⁽²⁾
EEDIVH / bit 1:0
EEDIVCLK / bit 7:0
1. Reserved for testing. Must be set to one in user application.
2. Reserved. Must be set to one in user application for future compatibility.
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
EEPROM Memory
Technical Data
115