MC912D60ACPVE8 Datasheet, PDF (330/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

MSCAN Controller
17.13 Programmer’s Model of Control Registers
17.13.1 Overview
The programmer’s model has been laid out for maximum simplicity and
efficiency.
17.13.2 msCAN12 Module Control Register 0 (CMCR0)
CMCR0 R
$0100 W
RESET
Bit 7
0
0
6
5
4
3
2
1
Bit 0
0
SYNCH
SLPAK
CSWAI
TLNKEN
SLPRQ SFTRES
0
1
0
0
0
0
1
CSWAI — CAN Stops in Wait Mode
0 = The module is not affected during WAIT mode.
1 = The module ceases to be clocked during WAIT mode.
SYNCH — Synchronized Status
This bit indicates whether the msCAN12 is synchronized to the CAN
bus and as such can participate in the communication process.
0 = msCAN12 is not synchronized to the CAN bus
1 = msCAN12 is synchronized to the CAN bus
TLNKEN — Timer Enable
This flag is used to establish a link between the msCAN12 and the on-
chip timer (see Timer Link).
0 = The port is connected to the timer input.
1 = The msCAN12 timer signal output is connected to the timer
input.
Technical Data
330
MSCAN Controller
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor