MC912D60ACPVE8 Datasheet, PDF (317/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

MSCAN Controller
Low Power Modes
Mode and generate interrupts (registers can be accessed via
background debug mode).
Table 17-2. msCAN12 vs. CPU operating modes
msCAN Mode
POWER_DOWN
STOP
CSWAI = X⁽¹⁾
SLPAK = X
SFTRES = X
SLEEP
SOFT_RESET
Normal
CPU Mode
WAIT
CSWAI = 1
SLPAK = X
SFTRES = X
CSWAI = 0
SLPAK = 1
SFTRES = 0
CSWAI = 0
SLPAK = 0
SFTRES = 1
CSWAI = 0
SLPAK = 0
SFTRES = 0
RUN
CSWAI = X
SLPAK = 1
SFTRES = 0
CSWAI = X
SLPAK = 0
SFTRES = 1
CSWAI = X
SLPAK = 0
SFTRES = 0
1. X means don’t care.
17.8.1 msCAN12 SLEEP Mode
The CPU can request the msCAN12 to enter this low-power mode by
asserting the SLPRQ bit in the Module Configuration Register (see
Figure 17-6). The time when the msCAN12 enters Sleep Mode depends
on its activity:
• If there are one or more message buffers are scheduled for
transmission (TXEx = 0), the msCAN will continue to transmit until
all transmit message buffers are empty (TXEx = 1, transmitted
successfully or aborted) and then goes into Sleep Mode.
• If it is receiving, it continues to receive and goes into Sleep Mode
as soon as the CAN bus next becomes idle.
• If it is neither transmitting nor receiving, it immediately goes into
Sleep Mode.
NOTE:
The application software must avoid setting up a transmission (by
clearing one or more TXE flag(s)) and immediately request Sleep Mode
(by setting SLPRQ). It then depends on the exact sequence of
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
MSCAN Controller
Technical Data
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