MC912D60ACPVE8 Datasheet, PDF (345/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

MSCAN Controller
Programmer’s Model of Control Registers
17.13.14 msCAN12 Identifier Mask Registers (CIDMR0–7)
The identifier mask register specifies which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering. To
receive standard identifiers in 32 bit filter mode it is required to program
the last three bits (AM2–AM0) in the mask registers CIDMR1 and
CIDMR5 to ‘don’t care’. To receive standard identifiers in 16 bit filter
mode it is required to program the last three bits (AM2–AM0) in the mask
registers CIDMR1, CIDMR3, CIDMR5 and CIDMR7 to ‘don’t care’.
CIDMR0 R
$0114
W
CIDMR1 R
$0115
W
CIDMR2 R
$0116
W
CIDMR3 R
$0117
W
RESET
Bit 7
AM7
AM7
AM7
AM7
–
6
AM6
AM6
AM6
AM6
–
5
AM5
AM5
AM5
AM5
–
4
AM4
AM4
AM4
AM4
–
3
AM3
AM3
AM3
AM3
–
2
AM2
AM2
AM2
AM2
–
1
AM1
AM1
AM1
AM1
–
Bit 0
AM0
AM0
AM0
AM0
–
CIDMR4 R
$011C
W
CIDMR5 R
$011D
W
CIDMR6 R
$011E
W
CIDMR7 R
$011F
W
RESET
Bit 7
AM7
AM7
AM7
AM7
–
6
AM6
AM6
AM6
AM6
–
5
AM5
AM5
AM5
AM5
–
4
AM4
AM4
AM4
AM4
–
3
AM3
AM3
AM3
AM3
–
2
AM2
AM2
AM2
AM2
–
1
AM1
AM1
AM1
AM1
–
Bit 0
AM0
AM0
AM0
AM0
–
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
MSCAN Controller
Technical Data
345