MC912D60ACPVE8 Datasheet, PDF (431/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Appendix: CGM Practical Aspects
Practical Aspects For The PLL Usage
Table 21-1. Suggested 8MHz Synthesis PLL Filter Elements (Tracking Mode)
Reference [MHz]
0.614
0.614
0.614
0.614
0.8
0.8
0.8
0.8
1
1
1
1
1.6
1.6
1.6
1.6
2
2
2
2
2.66
2.66
2.66
2.66
4
4
4
4
SYNR
$0C
$0C
$0C
$0C
$09
$09
$09
$09
$07
$07
$07
$07
$05
$05
$05
$05
$03
$03
$03
$03
$02
$02
$02
$02
$01
$01
$01
$01
Fbus [MHz]
7.98
7.98
7.98
7.98
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
C [nF]
100
4.7
1
0.33
220
10
2.2
0.47
220
10
2.2
0.47
330
10
3.3
1
470
22
4.7
1
220
22
4.7
1
220
33
10
2.2
R [kΩ]
4.3
20
43
75
2.7
12
27
56
2.4
11
24
51
1.5
9.1
15
27
1.1
5.1
11
24
1.5
4.7
10
22
1.2
3
5.6
12
Loop Bandwidth
[kHz]
1.1
5.3
11.5
20
0.9
4.2
8.6
19.2
1
4.7
9.9
21.4
1
5.9
10.2
18.6
0.96
4.4
9.6
20.8
1.6
5.1
11
24
1.98
5.1
9.3
19.8
Bandwidth
Limit [kHz]
157
157
157
157
201
201
201
201
251
251
251
251
402
402
402
402
502
502
502
502
668
668
668
668
1005
1005
1005
1005
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Appendix: CGM Practical Aspects
Technical Data
431