MC912D60ACPVE8 Datasheet, PDF (315/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

MSCAN Controller
Interrupts
17.6.1 Interrupt Acknowledge
Interrupts are directly associated with one or more status flags in either
the msCAN12 receiver flag register (CRFLG) or the msCAN12
transmitter flag register (CTFLG). Interrupts are pending as long as one
of the corresponding flags is set. The flags in above registers must be
reset within the interrupt handler in order to handshake the interrupt. The
flags are reset through writing a 1 to the corresponding bit position. A flag
cannot be cleared if the respective condition still prevails.
NOTE: Bit manipulation instructions (BSET) shall not be used to clear interrupt
flags.
17.6.2 Interrupt Vectors
The msCAN12 supports four interrupt vectors as shown in Table 17-1.
The vector addresses and the relative interrupt priority are dependent on
the chip integration and to be defined.
Table 17-1. msCAN12 Interrupt Vectors
Function
Wake-Up
Error
Interrupts
Receive
Transmit
Source
WUPIF
RWRNIF
TWRNIF
RERRIF
TERRIF
BOFFIF
OVRIF
RXF
TXE0
TXE1
TXE2
Local Mask
WUPIE
RWRNIE
TWRNIE
RERRIE
TERRIE
BOFFIE
OVRIE
RXFIE
TXEIE0
TXEIE1
TXEIE2
Global Mask
I Bit
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
MSCAN Controller
Technical Data
315