MC912D60ACPVE8 Datasheet, PDF (131/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

I/O Ports with Key Wake-up
Key Wake-up and Port Registers
Bit 7
6
5
DDG7
DDG6
DDG5
RESET:
0
0
0
DDRG — Port G Data Direction Register
4
DDG4
0
3
DDG3
0
2
DDG2
0
1
DDG1
0
Bit 0
DDG0
0
$002A
Data direction register G is associated with port G and designates each
pin as an input or output.
Read and write anytime
0 = Associated pin is an input
1 = Associated pin is an output
Bit 7
6
5
DDH7
DDH6
DDH5
RESET:
0
0
0
DDRH — Port H Data Direction Register
4
DDH4
0
3
DDH3
0
2
DDH2
0
1
DDH1
0
Bit 0
DDH0
0
$002B
Data direction register H is associated with port H and designates each
pin as an input or output.
Read and write anytime.
0 = Associated pin is an input
1 = Associated pin is an output
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
I/O Ports with Key Wake-up
Technical Data
131