MC912D60ACPVE8 Datasheet, PDF(149/460 Page) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

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MC912D60ACPVE8 Datasheet, PDF (149/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

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Clock Functions

Limp-Home and Fast STOP Recovery modes

EXTALi

Clock Monitor Fail

Limp-Home

13-stage counter

(Clocked by XCLK)

BCSP

0 --> 4096

Restore BCSP

STOP (DLY = 1)

STOP (DLY = 0)

SYSCLK

PLLCLK (L.H.) Restore PLLCLK or EXTALi

Figure 11-5. STOP Exit and Fast STOP Recovery

11.6.4 STOP exit without Limp Home mode, clock monitor disabled

(NOLHM=1, CME=0, DLY=X)

If Limp home mode is disabled (VDDPLL=VSS or NOLHM bit set) and the

CME (or FCME) bit is cleared, the MCU goes into STOP mode when a

STOP instruction is executed.

If EXTALi clock is present then exit from STOP will occur normally using

this clock. Under this condition, DLY should always be set to allow the

crystal to stabilise and minimise the risk of code runaway. With DLY=1

execution resumes after a delay of 4096 XCLK cycles.

NOTE: The external clock signal should stabilise within the 4096 reset counter

cycles. Use of DLY=0 is not recommended due to this requirement.

MC68HC912D60A â Rev. 3.1

Freescale Semiconductor

Clock Functions

Technical Data

149

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