MC912D60ACPVE8 Datasheet, PDF (425/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Electrical Specifications
Tables of Data
Table 20-16. CGM Characteristics
V_DD = 5.0 V dc ±10%, V_SS = 0 V dc, T_A = T_L to T_H
Characteristic
Symbol
Min.
Typ.
Max.
Unit
PLL reference frequency
Bus frequency
VCO range
VCO Limp-Home frequency
Lock Detector transition from Acquisition to
Tracking mode⁽²⁾
f_REF
0.5
8
MHz
f_BUS
0.004
8
MHz
f_VCO
2.5
8
MHz
f_VCOMIN
0.5
1
2.5⁽¹⁾
MHz
∆_trk
3%
4%
—
Lock Detection
Un-Lock Detection
Lock Detector transition from Tracking to
Acquisition mode⁽²⁾
∆_Lock
∆_unl
∆_unt
0%
0.5%
6%
1.5%
—
2.5%
—
8%
—
Minimum leakage resistance on crystal oscillator
pins
r_leak
1
MΩ
On the K38K mask set
PLL Stabilization delay⁽³⁾
PLL Total Stabilization Delay⁽⁴⁾
t_stab
3
ms
PLLON Acquisition mode stabilization delay.⁽⁴⁾
t_acq
1
ms
PLLON tracking mode stabilization delay.⁽⁴⁾
t_al
2
ms
1. On the K38K mask set, the limp home mode frequency is higher than the specified maximum limit.
2. AUTO bit set
3. PLL stabilization delay is highly dependent on operational requirement and external component values (i.e. crystal, XFC
filter component values|). Note (4) shows typical delay values for a typical configuration. Appropriate XFC filter values
should be chosen based on operational requirement of system.
4. f_REF = 4MHz, f_BUS = 8MHz (REFDV = #$00, SYNR = #$01), XFC:Cs = 33nF, Cp = 3.3nF, Rs = 2.7KΩ.
Table 20-17. Oscillator Characteristics
MC68HC912D60A MC68HC912D60C
Input buffer hysteresis⁽¹⁾
Min
Max
0
50
75
350
Resonator Frequency^{(2) Min}
0.5
0.5
(VDDPLL=VDD)
Max
8
8
Resonator Frequency^{(2) Min}
4
4
(VDDPLL=0V)
Max
10
10
1. These values are dervied from design simulation and are not tested
2. Specifications apply to quartz or ceramic resonators only
MC68HC912D60P
75
350
0.5
8
0.5
16
Unit
mV
MHz
MHz
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Electrical Specifications
Technical Data
425