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MC912D60ACPVE8 Datasheet, PDF (367/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data
Analog-to-Digital Converter
ATD Registers
S8C
S1C
Number of Conversions per
Sequence
0
0
4
0
1
1
1
X
8
Table 18-6. Conversion Sequence Length Coding
The result register assignments made to a conversion sequence follow
a few simple rules. Normally, the first result is placed in the first register;
the second result is placed in the second register, and so on. Table 18-
7 presents the result register assignments for the various conversion
lengths that are normally made. If FIFO mode is used, the result
register assignments differ. The results are placed in consecutive
registers between conversion sequences; the result register mapping
wraps around when the end of the register file is reached.
Number of Conversions per Sequence
1
4
8
Result Register Assignment
ADR0
ADR0 through ADR3
ADR0 through ADR7
Table 18-7. Result Register Assignment for Different Conversion Sequences
SCAN — Continuous Conversion Sequence Mode
0 = Perform a conversion sequence and return to idle mode
1 = Perform conversion sequences continuously (scan mode)
The scan mode bit controls whether or not conversion sequences are
performed continuously or not. If this control bit is 0, a write to control
register 4 or 5 will initiate a conversion sequence; the conversion
sequence will be executed; the sequence complete flag (SCF) will be
set, and the module will return to idle mode. In this mode, the module
remains powered up but no conversions are performed; the module
waits for the next conversion sequence to be initiated.
If this control bit is 1, a single conversion sequence initiation will result
in a continuously executed conversion sequence. When a conversion
sequence completes, the sequence complete flag (SCF) is set and a
new sequence is immediately begun. The conversion mode
characteristics of each sequence are identical. If a new conversion
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Analog-to-Digital Converter
Technical Data
367