MC912D60ACPVE8 Datasheet, PDF (70/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Registers
Address Bit 7
6
5
4
3
2
$01F0 Bit 15
14
13
12
11
10
$01F1 Bit 7
Bit 6
0
0
0
0
$01F2 Bit 15
14
13
12
11
10
$01F3 Bit 7
Bit 6
0
0
0
0
$01F4 Bit 15
14
13
12
11
10
$01F5 Bit 7
Bit 6
0
0
0
0
$01F6 Bit 15
14
13
12
11
10
$01F7 Bit 7
Bit 6
0
0
0
0
$01F8 Bit 15
14
13
12
11
10
$01F9 Bit 7
Bit 6
0
0
0
0
$01FA Bit 15
14
13
12
11
10
$01FB Bit 7
Bit 6
0
0
0
0
$01FC Bit 15
14
13
12
11
10
$01FD Bit 7
Bit 6
0
0
0
0
$01FE Bit 15
14
13
12
11
10
$01FF Bit 7
Bit 6
0
0
0
0
1
Bit 0
Name
9
Bit 8
ADR10H
0
0
ADR10L
9
Bit 8
ADR11H
0
0
ADR11L
9
Bit 8
ADR12H
0
0
ADR12L
9
Bit 8
ADR13H
0
0
ADR13L
9
Bit 8
ADR14H
0
0
ADR14L
9
Bit 8
ADR15H
0
0
ADR15L
9
Bit 8
ADR16H
0
0
ADR16L
9
Bit 8
ADR17H
0
0
ADR17L
= Reserved or unimplemented bits.
Table 4-1. MC68HC912D60A Register Map (Sheet 9 of 9)
1. Port A, port B and data direction registers DDRA, DDRB are not in map in expanded and peripheral modes.
2. Port E and DDRE not in map in peripheral mode; also not in map in expanded modes with EME set.
3. Registers also not in map in peripheral mode.
4. Data read at these locations is undefined.
5. The FPOPEN bit is available only on the 1L02H and later mask sets. For previous masks, this bit is reserved.
Technical Data
70
Registers
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor