MC912D60ACPVE8 Datasheet, PDF (347/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

MSCAN Controller
17.13.16 msCAN12 Port CAN Data Register (PORTCAN)
PORTCAN R
$013E W
RESET
Bit 7
PCAN7
0
6
PCAN6
0
5
PCAN5
0
4
PCAN4
0
3
PCAN3
0
2
PCAN2
0
1
TxCAN
0
Bit 0
RxCAN
0
PCAN7 – PCAN2 — Port CAN Data Bits (not available in 80QFP)
Writing to PCANx stores the bit value in an internal bit memory. This
value is driven to the respective pin only if DDCANx = 1.
Reading PCANx returns
• the value of the internal bit memory driven to the pin, if DDCANx = 1
• the value of the respective pin, if DDCANx = 0
Reading bits 1 and 0 returns the value of the TxCAN and RxCAN pins,
respectively.
17.13.17 msCAN12 Port CAN Data Direction Register (DDRCAN)
DDRCAN register determines the primary direction for the Port CAN pins
which are available as general purpose I/O. The value in the DDRCAN
also affects the source of data for reads of the corresponding Port CAN
register. When the DDCANx = 0 (input), the pin is read. When the
DDCANx =1 (output), the internal bit memory is read.
Bit 7
6
5
4
3
2
1
DDRCAN R
0
DDCAN7
DDCAN6
DDCAN5
DDCAN4
DDCAN3
DDCAN2
$013F W
RESET
0
0
0
0
0
0
0
Bit 0
0
0
DDCAN7 – DDCAN2 — Data Direction Port CAN Bits
0 = Respective I/O pin is configured for input.
1 = Respective I/O pin is configured for output.
Technical Data
347
MSCAN Controller
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor