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MC912D60ACPVE8 Datasheet, PDF (351/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data
Analog-to-Digital Converter
Modes of Operation
18.3 Modes of Operation
Analog to digital conversions are performed in a variety of different
programmable sequences referred to as conversion modes. Each
conversion mode is defined by:
• How many A/D conversions (one, four or eight) are performed in
a sequence
• Which analog input channels are examined during a sequence
• The sample time length
• Whether sequences are performed continuously or not
• Result register assignments
The modes are defined by the settings of three control bits (in ATDCTL5)
• MULT controls whether the sequence examines a single analog
input channel or scans a number of different channels
• SCAN determines if sequences are performed continuously
• SC determines if we are performing a special conversion i.e.
converting VRL, VRH, (VRL+VRH)/2 (usually used for test purposes).
and three control values
• CC/CB/CA (in ATDCTL5) define the input channel(s) to be
examined
• S8C/S1C (in ATDCTL3/5) define the number of conversions in a
sequence
• SMP0/SMP1 (in ATDCTL4) define the length of the sample time.
Sequences are initiated or halted by writing to control registers
ATDCTL4 and ATDCTL5.
For the continuous sequence modes, conversions will not stop until
• Another non-continuous conversion sequence is initiated and
finishes
• The ATD is powered down (ADPU control bit)
• The ATD is reset
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Analog-to-Digital Converter
Technical Data
351