MC912D60ACPVE8 Datasheet, PDF (419/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Electrical Specifications
Tables of Data
Table 20-13. Peripheral Port Timing
Characteristic
Frequency of operation (ECLK frequency)
ECLK period
Peripheral data setup time
MCU read of portst_PDSU = t_cyc/2 + 40
Peripheral data hold time
MCU read of ports
Delay time, peripheral data write
MCU write to ports except Port CAN
Delay time, peripheral data write
MCU write to Port CAN
Symbol
f_o
t_cyc
t_PDSU
t_PDH
t_PWD
t_PWD
8.0 MHz
Min
Max
0.004
8.0
0.125
250
102
—
Unit
MHz
µs
ns
0
—
ns
—
40
ns
—
71
ns
ECLK
PORTS
MCU READ OF PORT
t_PDSU
t_PDH
Figure 20-6. Port Read Timing Diagram
ECLK
PORT A
MCU WRITE TO PORT
PREVIOUS PORT DATA
t_PWD
NEW DATA VALID
Figure 20-7. Port Write Timing Diagram
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Electrical Specifications
Technical Data
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