MC912D60ACPVE8 Datasheet, PDF (178/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Oscillator
• Minimize Capacitance to VSS on EXTAL pin — The Colpitts
oscillator architecture is sensitive to capacitance in parallel with
the resonator (from EXTAL to VSS). Follow these techniques:
i. Remove ground plane from all layers around resonator
and EXTAL route
ii. Observe a minimum spacing from the EXTAL trace to all
other traces of at least three times the design rule
minimum (until the microcontroller’s pin pitch prohibits
this guideline)
iii. Where possible, use XTAL as a shield between EXTAL
and VSS
iv. Keep EXTAL capacitance to less than 1pF (2pF
absolute maximum)
• Shield all oscillator components from all noisy traces (while
observing above guideline).
• Keep the VSSPLL pin and the VSS reference to the oscillator
as identical as possible. Impedance between these signals must
be minimum.
• Observe best practice supply bypassing on all MCU power
pins. The oscillator’s supply reference is VDD, not VDDPLL.
• Account for XTAL–VSS and EXTAL–XTAL parasitics in
component values.
NOTE:
An increase in the EXTAL–XTAL parasitic as a result of reducing
EXTAL–VSS parasitic is acceptable provided component value is
reduced by the appropriate value.
• Minimize XTAL and EXTAL routing lengths to reduce EMC
issues.
NOTE:
EXTAL and XTAL routing resistances are less important than
capacitances. Using minimum width traces is an acceptable trade-off to
reduce capacitance.
Technical Data
178
Oscillator
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor