MC912D60ACPVE8 Datasheet, PDF (102/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Flash Memory
Use this step-by-step procedure to program a row of Flash memory.
1. Set the PGM bit. This configures the memory for program
operation and enables the latching of address and data for
programming.
2. Write to any aligned word Flash address within the row address
range desired (with any data) to select the row.
3. Wait for a time, t_NVS (min. 10µs).
4. Set the HVEN bit.
5. Wait for a time, t_PGS (min. 5µs).
6. Write one data word (two bytes) to the next aligned word Flash
address to be programmed. If BOOTP is asserted, an attempt to
program an address in the boot block will be ignored.
7. Wait for a time, t_FPGM (min. 30µs – max. 40µs).
8. Repeat steps 6 and 7 until all the words within the row are
programmed.
9. Clear the PGM bit.
10. Wait for a time, t_NVH (min. 5µs).
11. Clear the HVEN bit.
12. After time, t_RCV (min 1µs), the memory can be accessed in read
mode again.
This program sequence is repeated throughout the memory until all data
is programmed. For minimum overall programming time and least
program disturb effect, the sequence should be part of an intelligent
operation which iterates per row.
Technical Data
102
Flash Memory
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor