MC912D60ACPVE8 Datasheet, PDF (24/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

General Description
1.3 Devices Covered in this Document
The MC68HC912D60C and MC68HC912D60P are devices similar to
the MC68HC912D60A, but with different oscillator configurations. Refer
to Section 12. Oscillator for more details.
The generic term MC68HC912D60A is used throughout this document
to mean all derivatives mentioned above, except in Section 12.
Oscillator, where it refers only to the MC68HC912D60A device.
1.4 Features
• 16-bit CPU12
– Upward compatible with M68HC11 instruction set
– Interrupt stacking and programmer’s model identical to
M68HC11
– 20-bit ALU
– Instruction queue
– Enhanced indexed addressing
• Multiplexed bus
– Single chip or expanded
– 16 address/16 data wide or 16 address/8 data narrow mode
• Two 8-bit ports with key wake-up interrupt (2 pins only are
available on 80QFP) and one I²C start bit detector (112TQFP
only)
• Memory
– 60K byte flash EEPROM, made of a 28K module and a 32K
module with 8K bytes protected BOOT section in each module
(MC68HC912D60A)
– 1K byte EEPROM
– 2K byte RAM
Technical Data
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General Description
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor