MC912D60ACPVE8 Datasheet, PDF (110/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

EEPROM Memory
EEMCR — EEPROM Module Configuration
$00F0
Bit 7
6
5
4
3
NOBDML NOSHW _Reserved⁽¹⁾ _FPOPEN⁽²⁾
1
RESET:
—⁽³⁾
—
—
—
1
2
EESWAI
1
1
PROTLCK
0
Bit 0
DMY
0
1. Bit 5 has a test function and should not be programmed.
2. The FPOPEN bit is available only on the 1L02H and later mask sets. For previous masks, this bit is reserved.
3. Loaded from SHADOW word.
Bits[7:4] are loaded at reset from the EEPROM SHADOW word.
NOTE:
Bit 5 is reserved for test purposes. This location in SHADOW word
should not be programmed otherwise some locations of regular
EEPROM array will not be visible.
NOBDML — Background Debug Mode Lockout Disable
0 = The BDM lockout is enabled.
1 = The BDM lockout is disabled.
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
NOTE:
NOSHW — SHADOW Word Disable
0 = The SHADOW word is enabled and accessible at address
$0FC0-$0FC1.
1 = Regular EEPROM array at address $0FC0-$0FC1.
Loaded from SHADOW word at reset.
Read anytime. Write anytime in special modes (SMODN=0).
When NOSHW is cleared, the regular EEPROM array bytes at
address $0FC0 and $0FC1 are not visible. The SHADOW word is
accessed instead for both read and program/erase operations.
Bits[7:4] from the high byte of the SHADOW word, $0FC0, are loaded
to EEMCR[7:4]. Bits[1:0] from the high byte of the SHADOW word,
$0FC0,are loaded to EEDIVH[1:0]. Bits[7:0] from the low byte of the
SHADOW word, $0FC1,are loaded to EEDIVL[7:0]. BULK
program/erase only applies if SHADOW word is enabled.
Bit 6 from high byte of SHADOW word should not be cleared (set to '0')
in order to have the full EEPROM array visible. If Bit 6 from the high byte
of the SHADOW word is cleared then the following thirty bytes
$0FC2–$0FFF have no meaning and are reserved by Freescale.
Technical Data
110
EEPROM Memory
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor