MC912D60ACPVE8 Datasheet, PDF (116/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

EEPROM Memory
8.8 Programming EEDIVH and EEDIVL Registers
The EEDIVH and EEDIVL registers must be correctly set according to
the oscillator frequency before any EEPROM location can be
programmed or erased.
8.8.1 Normal mode
The EEDIVH and EEDIVL registers are write once in normal mode.
Upon system reset, the application program is required to write the
correct divider value to EEDIVH and EEDIVL registers based on the
oscillator frequency. After the first write, the value in the EEDIVH and
EEDIVL registers is locked from being overwritten until the next reset.
The EEPROM is then ready for standard program/erase routines.
CAUTION: Runaway code can possibly corrupt the EEDIVH and EEDIVL registers
if they are not initialized for the write once.
8.8.2 Special mode
If an existing application code with EEPROM program/erase routines is
already fixed and the system is already operating at a known oscillator
frequency, it is recommended to initialize the shadow word with the
corresponding EEDIVH and EEDIVL values in special mode. The
shadow word initializes EEDIVH and EEDIVL registers upon system
reset to ensure software compatibility with existing code. Initializing the
EEDIVH and EEDIVL registers in special modes (SMODN=0) is
accomplished by the following steps.
1. Write correct divider value to EEDIVH and EEDIVL registers
based on the oscillator frequency as per Table17.
2. Remove the SHADOW word protection by clearing SHPROT bit in
EEPROT register.
3. Clear NOSHW bit in EEMCR register to make the SHADOW word
visible at $0FC0-$0FC1.
4. Program bits 1 and 0 of the high byte of the SHADOW word and
bits 7 to 0 of the low byte of the SHADOW word like a regular
Technical Data
116
EEPROM Memory
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor