MC912D60ACPVE8 Datasheet, PDF (181/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Oscillator
MC68HC912D60C Colpitts Oscillator Specification
• The bias current to the amplifier was optimized for less variation
over process.
• The input ESD resistor from EXTAL to the gate of the oscillator
amplifier was changed to provide a parallel path, reducing
parasitic phase shift in the oscillator.
12.4.1.1 Clock Buffer Hysteresis
The input clock buffer uses an Operational Transconductance Amplifier
(labeled ‘OTA’ in the figure above) followed by a digital buffer to amplify
the input signal on the EXTAL pin into a full-swing clock for use by the
clock generation section of the microcontroller. There is an internal R-C
filter (composed of components RFLT2 and CFLT2 in the figure above),
which creates the DC value to which the EXTAL signal is compared. In
this manner, the clock input buffer can track changes in the EXTAL bias
voltage due to process variation as well as external factors such as
leakage.
Because the purpose of the clock input buffer is to amplify relatively low-
swing signals into a full-rail output, the gain of the OTA is very high. In
the configuration shown, this means that very small levels of noise can
be coupled onto the input of the clock buffer resulting in noise
amplification.
To remedy this issue, hysteresis was added to the OTA so that the circuit
could still provide the tolerance to leakage and the high gain required
without the noise sensitivity. Approximately 150mV of hysteresis was
added with a maximum hysteresis over process variation of 350mV. As
such, the clock input buffer will not respond to input signals until they
exceed the hysteresis level. At this point, the input signal due to
oscillation will dominate the total input waveform and narrow clock
pulses due to noise will be eliminated.
This circuit will limit the overall performance of the oscillator block only
in cases where the amplitude of oscillation is less than the level of
hysteresis. The minimum amplitude of oscillation is expected to be in
excess of 750mV and the maximum hysteresis is expected to be less
than 350mV, providing a factor of safety in excess of two.
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Oscillator
Technical Data
181