MC912D60ACPVE8 Datasheet, PDF (227/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Enhanced Capture Timer
Introduction
Load holding register and reset pulse accumulator
PT0
Edge detector
Delay counter
EDG0
0
8-bit PAC0 (PACN0)
PT1
Edge detector
Delay counter
EDG1
PA0H holding register
Interrupt
0
8-bit PAC1 (PACN1)
PT2
Edge detector
PA1H holding register
Delay counter
EDG2
0
8-bit PAC2 (PACN2)
PT3
Edge detector
Delay counter
EDG3
PA2H holding register
Interrupt
0
8-bit PAC3 (PACN3)
PA3H holding register
Figure 14-3. 8-Bit Pulse Accumulators Block Diagram
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Enhanced Capture Timer
Technical Data
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