MC912D60ACPVE8 Datasheet, PDF (410/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Electrical Specifications
Table 20-6. Analog Converter Characteristics (Operating)
V_DD = 5.0 Vdc ±10%, V_SS = 0 Vdc, T_A = T_L to T_H, ATD Clock = 2 MHz, unless otherwise noted
Characteristic
Symbol
Min Typical Max
8-bit resolution⁽¹⁾
1 count
20
8-bit absolute error^,(2)2, 4, 8, and 16 ATD sample clocks
AE
−1
+1
Unit
mV
count
10-bit resolution⁽¹⁾
1 count
5
mV
10-bit absolute error⁽²⁾ 2, 4, 8, and 16 ATD sample clocks
AE
–2.5
2.5 count
1. At V_RH – V_RL = 5.12V, one 8-bit count = 20 mV, and one 10-bit count = 5mV.
2. These values include quantization error which is inherently 1/2 count for any A/D converter.
Absolute errors only guaranteed when V_RL=V_SS, V_RH=V_DD and when external source impedence is close to zero.
Table 20-7. ATD AC Characteristics (Operating)
V_DD = 5.0 Vdc ±10%, V_SS = 0 Vdc, T_A = T_L to T_H, ATD Clock = 2 MHz, unless otherwise noted
Characteristic
Symbol
Min
Max
Unit
MCU clock frequency (p-clock)
f_PCLK
2.0
8.0
MHz
ATD operating clock frequency
f_ATDCLK
0.5
2.0
MHz
ATD 8-Bit conversion period
clock cycles⁽¹⁾
conversion time⁽²⁾
n_CONV8
18
t_CONV8
9
32
cycles
16
µs
ATD 10-Bit conversion period
clock cycles⁽¹⁾
conversion time⁽²⁾
Stop and ATD power up recovery time⁽³⁾
VDDA = 5.0V
n_CONV10
20
t_CONV10
10
t_SR
34
cycles
17
µs
10
µs
1. The minimum time assumes a final sample period of 2 ATD clock cycles while the maximum time assumes a final sample
period of 16ATD clocks.
2. This assumes an ATD clock frequency of 2.0MHz.
3. From the time ADPU is asserted until the time an ATD conversion can begin.
Technical Data
410
Electrical Specifications
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor