MC912D60ACPVE8 Datasheet, PDF (101/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Flash Memory
Programming the Flash EEPROM
7.7.2 Normal Operation
The Flash EEPROM allows a byte or aligned word read in one bus cycle.
A misaligned word read requires an additional bus cycle. The Flash
EEPROM array responds to read operations only. Write operations are
ignored.
7.7.3 Program/Erase Operation
An unprogrammed Flash EEPROM bit has a logic state of one. A bit
must be programmed to change its state from one to zero. Erasing a bit
returns it to a logic one. The Flash EEPROM has a minimum
program/erase life of 100 cycles. Programming or erasing the Flash
EEPROM is accomplished by a series of control register writes.
The Flash EEPROM must be completely erased prior to programming
final data values.
Programming and erasing of Flash locations cannot be performed by
code being executed from the Flash memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t_FPGM maximum (40µs).
7.8 Programming the Flash EEPROM
Programming the Flash EEPROM is done on a row basis. A row consists
of 32 consecutive words (64 bytes) with rows starting from addresses
$XX00, $XX40, $XX80 and $XXC0. When writing a row care should be
taken not to write data to addresses outside of the row. Programming is
restricted to aligned word i.e. data writes to select rows/blocks for
programming/erase should be to even adresses and writes to any row
for programming should be to aligned words.
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Flash Memory
Technical Data
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