MC912D60ACPVE8 Datasheet, PDF (376/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

Analog-to-Digital Converter
18.9.8 ADRx A/D Conversion Result Registers (ADR0-15)
ADRx0H — A/D Converter Result Register 0
ADRx0L — A/D Converter Result Register 0
ADRx1H — A/D Converter Result Register 1
ADRx1L — A/D Converter Result Register 1
ADRx2H — A/D Converter Result Register 2
ADRx2L — A/D Converter Result Register 2
ADRx3H — A/D Converter Result Register 3
ADRx3L — A/D Converter Result Register 3
ADRx4H — A/D Converter Result Register 4
ADRx4L — A/D Converter Result Register 4
ADRx5H — A/D Converter Result Register 5
ADRx5L — A/D Converter Result Register 5
ADRx6H — A/D Converter Result Register 6
ADRx6L — A/D Converter Result Register 6
ADRx7H — A/D Converter Result Register 7
ADRx7L — A/D Converter Result Register 7
$0070/$01F0
$0071/$01F1
$0072/$01F2
$0073/$01F3
$0074/$01F4
$0075/$01F5
$0076/$01F6
$0077/$01F7
$0078/$01F8
$0079/$01F9
$007A/$01FA
$007B/$01FB
$007C/$01FC
$007D/$01FD
$007E/$01FE
$007F/$01FF
ADRxxH
ADRxxL
RESET:
Bit 15
Bit 7
0
6
5
4
3
2
1
Bit 8
Bit 6
0
0
0
0
0
0
0
0
0
0
0
0
0
The A/D conversion results are stored in 8 result registers. These
registers are designated ADR0 through ADR7.
The result data is formatted using the DJM control bit in ATDCTL2. For
8-bit result data, the result data maps between the high (left justified) and
low (right justified) order bytes of the result register. For 10-bit result
data, the result data maps between bits 6-15 (left justified) and bits 0-9
(right justified) of the result register.
These registers are normally read-only.
Technical Data
376
Analog-to-Digital Converter
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor