MC912D60ACPVE8 Datasheet, PDF (359/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

18.9.1 ATD Control Registers 0 &1 (ATDCTL0, ATDCTL1)
Analog-to-Digital Converter
ATD Registers
ATD0CTL0/ATD1CTL0 — Reserved
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Bit 7
6
5
4
3
2
1
Bit 0
RESET:
0
0
0
0
0
0
0
0
Writes to this register will abort current conversion sequence.
Read or write any time.
ATD0CTL1/ATD1CTL1 — Reserved
Bit 7
6
5
4
3
2
1
RESET:
0
0
0
0
0
0
0
WRITE: Write to this register has no meaning.
READ: Special Mode only.
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Bit 0
0
18.9.2 ATD Control Registers 2 & 3 (ATDCTL2, ATDCTL3)
The ATD control registers 2 & 3 are used to select the power up mode,
fast flag clear mode, wait mode, 16 channel mode, interrupt control, and
freeze control. Writes to these registers will not abort the current
conversion sequence nor start a new sequence.
ATD0CTL2/ATD1CTL2 — ATD Control Register 2
RESET:
Bit 7
ADPU
0
6
AFFC
0
5
ASWAI
0
4
DJM
0
3
Reserved
0
2
Reserved
0
1
ASCIE
0
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Bit 0
ASCIF
0
READ: any time
WRITE: any time
(except for Bit 0 – ASCIF, READ: any time, WRITE: not allowed)
ADPU — ATD Disable / Power Down
0 = Disable and power down the ATD
1 = Normal ATD functionality
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
Analog-to-Digital Converter
Technical Data
359