MC912D60ACPVE8 Datasheet, PDF (114/460 Pages) Freescale Semiconductor, Inc – MC68HC912D60A MC68HC912D60C MC68HC912D60P Technical Data

EEPROM Memory
ERASE — Erase Control
0 = EEPROM configuration for programming.
1 = EEPROM configuration for erasure.
Read anytime. Write anytime if EEPGM = 0.
Configures the EEPROM for erasure or programming.
Unless BULKP is set, erasure is by byte, aligned word, row or bulk.
EELAT — EEPROM Latch Control
0 = EEPROM set up for normal reads.
1 = EEPROM address and data bus latches set up for
programming or erasing.
Read anytime.
Write anytime except when EEPGM = 1 or EEDIV = 0.
BYTE, ROW, ERASE and EELAT bits can be written simultaneously
or in any sequence.
EEPGM — Program and Erase Enable
0 = Disables program/erase voltage to EEPROM.
1 = Applies program/erase voltage to EEPROM.
The EEPGM bit can be set only after EELAT has been set. When
EELAT and EEPGM are set simultaneously, EEPGM remains clear
but EELAT is set.
The BULKP, AUTO, BYTE, ROW, ERASE and EELAT bits cannot be
changed when EEPGM is set. To complete a program or erase cycle
when AUTO bit is clear, two successive writes to clear EEPGM and
EELAT bits are required before reading the programmed data.
When the AUTO bit is set, EEPGM is automatically cleared after the
program or erase cycle completes. Note that if an attempt is made to
modify a protected block location the modify cycle does not start and
the EEPGM bit isn’t automatically cleared.
A write to an EEPROM location has no effect when EEPGM is set.
Latched address and data cannot be modified during program or
erase.
Technical Data
114
EEPROM Memory
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor